PROMISE eFPGA IP CDR Milestone successfully reached – the first critical enabler for ASSP

PROMISE eFPGA IP CDR Milestone successfully reached – the first critical enabler for ASSP

After a first successful phase of collaboration with IMEC, that led to a set of optimized radiation hardened standard cells for best PPAs (Power, Performances, Area) covered in task 2.1 of WP2, Menta has successfully delivered on schedule to the PROMISE project, its radiation hardened embedded FPGA (eFPGA) IP that will be integrated in PROMISE Pilot Circuit, closing task 2.6 of WP2.

The close collaboration inside the consortium led to a fluent design process from specification to the final data package delivery.

  • IP technology is XFAB 180 nm (XH018)
  • eFPGA IP of 1750 LC (capacity similar to Microsemi RTSX32)  + 3 additional DSP
  • eFPGA IP is designed 100% using   DARE180X heritage and PROMISE rad-hard standard cells designed by IMEC.

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