IMEC, Europe’s largest independent micro-electronics research center, founded in 1984 by the Flemish Government, is one of the largest in the world in the field of microelectronics. Its leading role in Europe has been increased after the successful merger with iMinds, which was completed in September 2016. The renewed imec organization now brings together nearly 3,500 researchers from all over the world, to make the impossible possible in many application areas. It has access to a unique infrastructure, including 12,000 m2 of cleanrooms with the most advanced equipment for research into next-generation IC technologies, and state-of-the-art bio, network and imaging labs. And, of course, an extensive network of local and international industrial and university partners for intensive collaboration. IMEC performs scientific research which runs 3 to 10 years ahead of industrial needs. The most important scientific activities are concentrated on the development of new process technologies for the next generation of chips, optoelectronic components, microsystems, solar cells, sensors… In addition, work is oriented towards new design technologies for electronic systems (such as the design of complete systems on a single chip), with a special focus to telecommunications and multimedia. IMEC performs education and training of experts in the field of microelectronics through its microelectronics training center. Many training courses are organized annually in the field of chip design, process technology and related domains.
Role in the project
IMEC’s expertise in the scope of this work is in the following fields:
- IMEC knows and understands the details of the digital library amd analog IP generation flow & methodology, specifically for radiation hardened elements.
- IMEC has experience with designing ASIC’s for space applications (a.o. PDFE, LTMS, TIMPO32…) in close collaboration with ESA and European space industry.
- IMEC has been providing a commercial ASIC implementation service since 1997. Through its Europractice and Value Chain Aggregation activities imec offers prototype and small volume manufacturing, packaging and test services including qualification for space, based on commercially available technologies.
- IMEC has a broad background in design for radiation environments and more in particular has designed, is enhancing and is providing the DARE180 library families and compatible radiation hardened analog IP blocks for UMC and XFAB. Work was also done on 90nm UMC and on 65nm TSMC (for CERN and for ESA).
Significant infrastructure and/or any major items of technical equipment, relevant to the proposed work
Imec has an extensive computer-network of Linux and Windows workstations as well as Linux multi-processor design servers with an abundance of internal memory to handle the needs of the most advanced technology nodes. Imec has access to state of the art chip design tools from the major vendors (e.g. Cadence, Synopsys & Mentor Graphics), supporting deep-submicron design and layout generation.
Linked projects and initiatives
From 1989 until 1995, IMEC was partner of the EU-funded project EUROCHIP. This project was funded by the Commission to set up a pan-European service for access to CAD tools and organizing low cost prototyping for academics. IMEC was responsible for the IC technology access and IC prototyping in EUROCHIP. From 1995 until now, imec is the leading partner of the EU-funded project EUROPRACTICE and is responsible for the ASIC part of the EUROPRACTICE IC Service. In the course of ESA funded and Space projects IMEC has, since 2000, created mixed-signal platforms for Space applications based on several technologies. These platforms are called DARE (Design Against Radiation Effects) platforms. The 180nm UMC CMOS DARE platform has already proven its capability for the implementation of complex mixed-signal ASICs. This platform is building up a legacy with several projects in the pipeline for the mixed-signal version of the technology as well as for the CMOS imager technology. Specifically, for the proposed Project, IMEC’s IC-link unit has extensive background in ASIC design, layout, prototyping and small-volume fabrication, test and qualification service. IMEC’s design services team has been supporting commercial and scientific tape outs for almost 2 decades now with an excellent first-time-right record. The design services team handles over 40 tape outs per year and teaches design methodology, verification and low-power design techniques to academia and industry. IMEC’s design services are foundry independent. The team has already taped out to thirteen different foundries in technology nodes down to 16nm. The team is familiar with the advanced digital implementation flow and low-power techniques like massive clock gating, power shut-off, multi supply voltage, multi Vt, body bias, CPF/UPF flow, multi-mode multi-corner optimization & analysis, etc. The design service covers not only digital, analog and mixed analog/digital design flows for a wide variety of processes and libraries, down to the most advanced nodes, but also niche library design such as the family of standard cell libraries known as DARE (design against radiation effects). DARE libraries were developed using layout and circuit design techniques to harden commercially available technology against radiation effects in the course of – mainly – projects funded by the ESA. Several most successful space and RH project might be listed:
- The 180 nm UMC CMOS DARE (DARE180U) platform has already proven its capability for the implementation of complex mixed-signal ASICs (e.g DPC). This platform is building up a legacy with several projects in the pipeline for the logic version of the technology (SSDP, uController, CLP, MinIMU…) as well as for the CMOS imager technology (SSOC, Faintstar).
- XFAB .18 XH platform has been designed and a Test Vehicle for the building blocks in the platform created. The availability of Non-Volatile Memory and High Voltage options, not available in the UMC platform were the reasons for creating this platform.
- ON Semiconductor I3T80 technology additions to the PDK for high-voltage radiation hardened design have been done (aka ADK).
- The 65 nm TSMC CMOS DARE (DARE65T) platform is under development since 2017. The project is ESA funded. Once finished the platform will consist of RH high-performance standard and IO cell libraries, SRAM memory compiler and analogue IPs. Test vehicles to assess the radiation hardness were taped-out and design of a full digital ASIC with the DARE65T technology is currently ongoing